Intel opens D1X-Mod3 Fab expansion; Moves Intel 18A Manufacturing up to H2’2024

In the last few years, Intel has undergone a major period of production expansion for the company. While recent announcements about new facilities in Ohio and Germany have understandably taken much of the spotlight – especially given their importance to Intel’s Foundry Services plans – Intel has worked even further to expand their existing facilities for its own use. The company’s development of next-generation EUV and Gate-All-Around transistors (RibbonFET) not only requires creating and refining the underlying technology, but it also just requires more space. Much of that.

To that end, Intel today holds a grand opening in Oregon for the Mod3 expansion of the D1X, the company’s primary development plant. The expansion, first announced back in 2019, is the third such mod (module) and second expansion to Intel’s main developer factory to be built since D1X’s first design in 2010. And in keeping with the tradition of Intel’s fab launches and expansions, is the company making something of an event out of it, including bringing the Oregon governor out to show off their $ 3 billion investment.

But aside from the fanfare, the latest fab for fab is a really important one for Intel: not only does it add another 270,000 square feet of clean space to the plant – expanding the D1X by about 20% – but it’s the only fab module large enough to support the EUV tool High Numerical Aperture (High NA), which Intel will use from its 18A process. ASML’s upcoming TWINSCAN EXE: 5200 EUV tool is designed to be their most powerful yet, but it’s also a lot bigger than the NXE 3000 series EUV tools that Intel uses for their first generation of EUV processes (Intel 4 / Intel 3). It is so large that the D1X’s ceiling is too low to fit the machine, puddle with the floor that carries its weight.

Size comparison: ASML Normal & High NA EUV Machines

As a result, the Mod3 has been built, in no small part, to fit this massive machine. Intel does not expect to receive the machine in a few years yet, but they had to start preparations years in advance to reach this point.

Meanwhile, although the D1X-Mod3 has only been officially declared open today, Intel has already moved critical tools into Mod3 since August last year. Consequently, today’s opening is something of a ceremonial launch of the mod, as parts of it have already been set up (if not already in use). Still, even with that lead, according to Intel, the company expects to move tools into another year, especially as they bring in the remaining, lower-priority tools.

Coincidentally, our own Dr. Ian Cutress a chance to see the D1X in all its glory last year when he toured the facility. At that time, Intel was already in the final stages of completing the Mod3 expansion, as well as bringing EUV machines up as part of the development of Intel 4 and Intel 3 process nodes, Intel’s first EUV nodes. So for more information on D1X and what’s going on there, be sure to check out that article.

A line of EUV machines at D1X

Finally, along with the formal opening of the Mod3 expansion, Intel today also uses the option to rename the 450-acre campus on which the D1X sits. Intel’s Ronler Acres campus has been the center of Intel’s fantastic R&D efforts for decades and, along with the D1X, also houses Intel’s older D1 development factories, such as the D1B, D1C and D1D. So as a reflection of all the important research and development going on on the site, Intel is renaming it after co-founder Gordon Moore, one of the instrumental figures behind the development of Intel’s earliest technologies. The newly renamed campus will now pass by Gordon Moore Park at Ronler Acresor Gordon Moore Park too short. And despite the many (many) things that have been named after Moore over the years, from laws and buildings to awards and medals, this is the greatest thing named after Moore (yet), as it is the first time, an entire campus has been named after the light.

Intel Roadmap Update: Intel 18A moved up to H2 2024

In addition to briefing the press on the D1X-Mod3 opening, Intel also used their latest press event to get everyone updated on the latest updates on Intel’s development plan. Strictly speaking, nothing here is new – all this was first announced during Intel’s 2022 investor meeting back in February. However, this is the first time Intel has engaged the technical press, rather than investors, about the current development efforts.

The big news here is that Intel is formally moving up on the launch date for manufacturing on the Intel 18A node. Intel’s second-generation “angstrom” node was originally expected in 2025; but now the company is increasing it by half a year to the second half of 2024.

As a result, Intel’s roadmap now looks like this:

As the company is already ready for its first EUV process, Intel 4, later this year, Intel’s roadmap will start to look very compressed from the second half of 2023. In the second half of that year, Intel 3 will go into production, which is Intel’s improved EUV process. Meanwhile, potentially as soon as 6 months after that, Intel 20A goes into production. 20A is Intel’s first “anxiety space” node, incorporating their gate-all-around style “RibbonFET” FinFets, as well as PowerVias.

But if all goes according to plan, 20A will apparently be a relatively short-lived node due to the movement of 18A. Intel’s second generation angstrom node, which will incorporate an updated tape design and other enhancements to Intel’s GAA production technology. As 18A remains the longest node out on Intel’s production schedules, the company remains relatively mother in all the new that 18A will entail, but it’s still the point where Intel plans to re-establish undisputed leadership of the chip manufacturing industry.

According to Intel, 18A developments have moved so well that the company’s R & D activities are now on or ahead of all their development milestones, giving the company confidence that they can start manufacturing products based on the process node at the end of 2024 instead of 2025 as first planned.

One consequence of bringing in 18A, however, is that it means that Intel is now definitely going into the first production of 18A without all their High NA machines. 18A remains the process hub where High NA machines will debut, but as the TWINSCAN EXE 5200 is still not expected to be in place until 2025, this means that Intel will now need to use their existing 3000 series machines to kickstart 18A production. Until this latest development, Intel had presented High NA machines and 18A as being tied at the hip, so whether that was always the actual case or not, it is now clearly not the case.

What this means for 18A production, in turn, must become clear. Since Intel can use their normal (non-HA) machines for 18A, the biggest advantages of the High NA machines were probably throughput, which allows Intel to process wafers with a little (or not) multi-pattern thanks to High NA’s greater accuracy. Apparently, the most likely result is that Intel will be able to produce 18A in 2024, and maybe even in decent quantities, but that they will not be able to go into Intel-scale high-volume production before the first High NA machine is available in 2025.

And as always, it should be noted that Intel’s production schedule dates are the earliest dates when a new process node goes into production, not the date when technology-based hardware hits the shelves. So even though 18A launches in H2’24 as it is now planned, it may well take a few months into 2025 before the first products are in customer hands, especially if Intel launches in the later part of that window. All of this, given the sheer size of these launch windows and Intel’s own history, is a likely bid, as Intel has rarely launched new products / technologies early in a release window.

Finally, Intel’s development briefing also included a confirmation that Intel is using a pure internal “test risk reduction” node as part of their development process for their PowerVia technology. The purpose of the test node is to decouple the full risk at 20A by allowing Intel to develop and test PowerVias separately from RibbonFETs. In this case, the test node uses Intel’s well-established FinFET technology on the front-end, while applying a test version of PowerVia on the back-end. No such node has been announced for RibbonFETs, but even if one does not exist, it is still a simplification of the process that one does not have to debug first-generation PowerVia at 20A along with the RibbonFETs, as it allows Intel to pursue both elements semi-independently, and learn from both of them in the process.

This is a significant change from how Intel has developed major new production nodes in the past, and even they are the first to admit it. Intel’s 10nm problems were largely due to collecting too many technology changes at once, combined with a very aggressive reduction in feature size. Separating these things into smaller, more frequent production node updates was one way Intel reduced this risk in the future. And now with an internal test node for PowerVia development, they aim to do even more risk mitigation in order to roll out both RibbonFETs and PowerVia together in the first half of 2024 as part of the Intel 20A.

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